CPUID—CPU Identification (Continued)
BREAK;
EAX = 80000004H:
EAX Processor Name;
EBX Processor Name;
ECX Processor Name;
EDX Processor Name;
BREAK;
DEFAULT: (* EAX > highest value recognized by CPUID *)
EAX Reserved, Undefined;
EBX Reserved, Undefined;
ECX Reserved, Undefined;
EDX Reserved, Undefined;
BREAK;
ESAC;
memory_fence();
instruction_serialize();
Flags Affected
None.
Additional Itanium System Environment Exceptions
Itanium Reg Faults NaT Register Consumption Abort.
Exceptions (All Operating Modes)
None.
Intel Architecture Compatibility
The CPUID instruction is not supported in early models of the Intel486 processor or in
any Intel architecture processor earlier than the Intel486 processor. The ID flag in the
EFLAGS register can be used to determine if this instruction is supported. If a procedure
is able to set or clear this flag, the CPUID is supported by the processor running the
procedure.
4:84
Volume 4: Base IA-32 Instruction Reference