Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1739

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PSLLW/PSLLD/PSLLQ—Packed Shift Left Logical
Opcode
0F F1 /r
0F 71 /6, ib
0F F2 /r
0F 72 /6 ib
0F F3 /r
0F 73 /6 ib
Description
Shifts the bits in the data elements (words, doublewords, or quadword) in the
destination operand (first operand) to the left by the number of bits specified in the
unsigned count operand (second operand). (See
operation is written to the destination operand. As the bits in the data elements are
shifted left, the empty low-order bits are cleared (set to zero). If the value specified by
the count operand is greater than 15 (for words), 31 (for doublewords), or 63 (for a
quadword), then the destination operand is set to all zeros.
The destination operand must be an MMX technology register; the count operand can
be either an MMX technology register, a 64-bit memory location, or an 8-bit immediate.
The PSLLW instruction shifts each of the four words of the destination operand to the
left by the number of bits specified in the count operand; the PSLLD instruction shifts
each of the two doublewords of the destination operand; and the PSLLQ instruction
shifts the 64-bit quadword in the destination operand. As the individual data elements
are shifted left, the empty low-order bit positions are filled with zeros.
Figure 3-16.
mm
mm
®
Volume 4: IA-32 Intel
MMX™ Technology Instruction Reference
Instruction
PSLLW mm, mm/m64
PSLLW mm, imm8
PSLLD mm, mm/m64
PSLLD mm, imm8
PSLLQ mm, mm/m64
PSLLQ mm, imm8
Operation of the PSLLW Instruction
PSLLW mm, 2
shift left
shift left
Description
Shift words in mm left by amount specified in mm/m64 , while
shifting in zeros.
Shift words in mm left by imm8 , while shifting in zeros.
Shift doublewords in mm left by amount specified in mm/m64 ,
while shifting in zeros.
Shift doublewords in mm by imm8 , while shifting in zeros.
Shift mm left by amount specified in mm/m64 , while shifting in
zeros.
Shift mm left by Imm8, while shifting in zeros.
Figure
3-16.) The result of the shift
1111111111111100
shift left
1111111111110000
0001000111000111
shift left
0100011100011100
3006026
4:437

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