ST STM32L4+ Series Reference Manual page 1601

RM0432
increasing the synchronous prescaler value (PREDIV_S[14:0]). The maximum resolution
allowed (30.52 μs with a 32768 Hz clock) is obtained with PREDIV_S set to 0x7FFF.
However, increasing PREDIV_S means that PREDIV_A must be decreased in order to
maintain the synchronous prescaler output at 1 Hz. In this way, the frequency of the
asynchronous prescaler output increases, which may increase the RTC dynamic
consumption. The RTC dynamic consumption is optimized for PREDIV_A+1 being a power
of 2.
Note: After a system reset, the application can read the INITS flag in the RTC_ICSR register to
check if the calendar has been initialized or not. If this flag equals 0, the calendar has not
been initialized since the year field is set at its Backup domain reset default value (0x00).
To read the calendar after initialization, the software must first check that the RSF flag is set
in the RTC_ICSR register.
Daylight saving time
The daylight saving time management is performed through bits SUB1H, ADD1H, and BKP
of the RTC_CR register.
Using SUB1H or ADD1H, the software can subtract or add one hour to the calendar in one
single operation without going through the initialization procedure.
In addition, the software can use the BKP bit to memorize this operation.
Programming the alarm
A similar procedure must be followed to program or update the programmable alarms. The
procedure below is given for alarm A but can be translated in the same way for alarm B.
1. Clear ALRAE in RTC_CR to disable alarm A.
2. Program the alarm A registers (RTC_ALRMASSR/RTC_ALRMAR or
RTC_ALRMABINR).
3. Set ALRAE in the RTC_CR register to enable alarm A again.
Note: Each change of the RTC_CR register is taken into account after around 2 RTCCLK clock
cycles due to clock synchronization.
Programming the wakeup timer
The following sequence is required to configure or change the wakeup timer auto-reload
value (WUT[15:0] in RTC_WUTR):
1. Clear WUTE in RTC_CR to disable the wakeup timer.
2. Poll WUTWF until it is set in RTC_ICSR to make sure the access to wakeup auto-
reload counter and to WUCKSEL[2:0] bits is allowed. This step must be skipped in
calendar initialization mode.
If WUCKSEL[2] = 0: WUTWF is set around 1 ck_wut + 1 RTCCLK cycles after WUTE
bit is cleared.
If WUCKSEL[2] = 1: WUTWF is set up to 1 ck_apre + 1 RTCCLK cycles after WUTE bit
is cleared.
3. Program the wakeup auto-reload value WUT[15:0], WUTOCLR[15:0] and the wakeup
clock selection (WUCKSEL[2:0] bits in RTC_CR). Set WUTE in RTC_CR to enable the
timer again. The wakeup timer restarts down-counting.
If WUCKSEL[2] = 0: WUTWF is cleared around 1 ck_wut + 1 RTCCLK cycles after
WUTE bit is set.
Real-time clock (RTC) applied to STM32L4P5xx and STM32L4Q5xx only
RM0432 Rev 6 1601/2301
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