ST STM32L4+ Series Reference Manual page 1635

RM0432 Tamper and backup registers (TAMP) applied to STM32L4P5xx and STM32L4Q5xx only
Internal signal name
tamp_ker_ck
tamp_pclk
tamp_evt
tamp_erase
tamp_it
tamp_trg[x]
(x = signal index)
The TAMP kernel clock is usually the LSE at 32.768 kHz although it is possible to select
other clock sources in the RCC (refer to RCC for more details). Some detections modes are
not available in some low-power modes or V
Section 48.4: TAMP low-power modes
Signal name
tamp_evt
tamp_erase
48.3.3 TAMP register write protection
After system reset, the TAMP registers (including backup registers) are protected against
parasitic write access by the DBP bit in the power control peripheral (refer to the PWR
power control section). DBP bit must be set in order to enable TAMP registers write access.
48.3.4 Tamper detection
The tamper detection can be configured for the following purposes:
• erase the backup registers (default configuration)
•
generate an interrupt, capable to wakeup from Stop and Standby mode
• generate a hardware trigger for the low-power timers
TAMP backup registers
The backup registers (TAMP_BKPxR) are not reset by system reset or when the device
wakes up from Standby mode.
Table 328. TAMP internal input/output signals
Signal type
Input
Input
Output
Output
Output
Output
for more details.
Table 329. TAMP interconnection
rtc_tamp_evt used to generate a timestamp event
The tamp_erase signal is used to erase the device secrets listed
hereafter: backup registers
RM0432 Rev 6
Description
TAMP kernel clock, connected to rtc_ker_ck
and also named RTCCLK in this document
TAMP APB clock, connected to rtc_pclk
Tamper event detection (internal or external)
The tamp_evt is used to generate a RTC
timestamp event
Device secrets erase request following either
tamper event detection (internal or external) or
the software erase request done by writing
BKERASE to 1
TAMP interrupt (refer to
interrupts for details)
Tamper detection trigger
when the selected clock is not LSE (refer to
BAT
Source/Destination
Section 48.5: TAMP
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