RM0351
Bits 31:0 BKP[31:0]
34.6.21
RTC register map
Offset
Register
RTC_TR
0x00
Reset value
RTC_DR
0x04
Reset value
RTC_CR
0x08
Reset value
RTC_ISR
0x0C
Reset value
RTC_PRER
0x10
Reset value
RTC_WUTR
0x14
Reset value
RTC_ALRMAR
0x1C
Reset value
0
RTC_ALRMBR
0x20
Reset value
0
RTC_WPR
0x24
Reset value
RTC_SSR
0x28
Reset value
RTC_SHIFTR
0x2C
Reset value
0
The application can write or read data to and from these registers.
They are powered-on by V
System reset, and their contents remain valid when the device operates in low-power mode.
This register is reset on a tamper detection event, as long as TAMPxF=1. or when the Flash
readout protection is disabled.
Table 174. RTC register map and reset values
0
0
0
DT
DU[3:0]
[1:0]
0
0
0
0
0
0
0
0
DT
DU[3:0]
[1:0]
0
0
0
0
0
0
0
0
DocID024597 Rev 3
when V
is switched off, so that they are not reset by
BAT
DD
HT
HU[3:0]
[1:0]
0
0
0
0
0
0
0
YT[3:0]
YU[3:0]
WDU[2:0]
0
0
0
0
0
0
0
0
OSE
L
[1:0]
0
0
0
0
0
0
0
0
0
PREDIV_A[6:0]
1
1
1
1
1
1
1
0
1
HT
HU[3:0]
[1:0]
0
0
0
0
0
0
0
0
HT
HU[3:0]
[1:0]
0
0
0
0
0
0
0
0
0
Real-time clock (RTC)
MNT[2:0]
MNU[3:0]
0
0
0
0
0
0
0
MU[3:0]
0
1
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PREDIV_S[14:0]
0
0
0
0
0
0
0
1
WUT[15:0]
1
1
1
1
1
1
1
1
MNT[2:0]
MNU[3:0]
0
0
0
0
0
0
0
0
MNT[2:0]
MNU[3:0]
0
0
0
0
0
0
0
0
0
SS[15:0]
0
0
0
0
0
0
0
0
SUBFS[14:0]
0
0
0
0
0
0
0
0
ST[2:0]
SU[3:0]
0
0
0
0
0
0
0
DT
DU[3:0]
[1:0]
0
0
0
0
0
1
WUCKS
EL[2:0]
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
ST[2:0]
SU[3:0]
0
0
0
0
0
0
0
ST[2:0]
SU[3:0]
0
0
0
0
0
0
0
KEY
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1105/1693
1106
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