Rtc Timestamp Date Register (Rtc_Tsdr) - ST STM32L4x6 Reference Manual

Real-time clock (RTC)
34.6.13

RTC timestamp date register (RTC_TSDR)

The content of this register is valid only when TSF is set to 1 in RTC_ISR. It is cleared when
TSF bit is reset.
Address offset: 0x34
Backup domain reset value: 0x0000 0000
System reset: not affected
31 30 29
Res. Res. Res. Res.
15 14 13
WDU[1:0]
r r r
Bits 31:16 Reserved, must be kept at reset value
Bits 15:13 WDU[1:0]: Week day units
Bit 12 MT: Month tens in BCD format
Bits 11:8 MU[3:0]: Month units in BCD format
Bits 7:6 Reserved, must be kept at reset value
Bits 5:4 DT[1:0]: Date tens in BCD format
Bits 3:0 DU[3:0]: Date units in BCD format
1096/1693
28 27 26 25
Res. Res. Res.
12 11 10 9
MT MU[3:0]
r r r r
DocID024597 Rev 3
24 23 22 21
Res. Res. Res. Res.
8 7 6 5
Res. Res.
r r
20 19 18
Res. Res. Res.
4 3 2
DT[1:0] DU[3:0]
r r r
RM0351
17 16
Res. Res.
1 0
r r