Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1738

Configuration for Memory Read and Write Transactions
3. Configure the target address registers.
4. Write 0x8000 0000 to the
5. Write 0x0000 0000 to the
6. Configure the region through the region control 1 inbound register.
7. Write 0x0000 0000 to the
MEM.
8. Enable the region for BAR match mode.
9. Write 0xC000 0400 to the
BAR#4.
63
63
NOTE:
1. Setting the destination address for the BAR match is tied closely to the BAR mask. For example BAR0 has a BAR mask of 0xF0000000 meaning
it can be assigned any address with bits [31:28] between 0x1 and 0xF and bits [27:0] always 0x0000000. The BAR match address translation mode
also uses this mask. PCIe's target address should provide the correct [27:0] bits
Figure 29-6: iATU Address Region Mapping: Inbound 64-bit (BAR Match Mode)
Inbound Programming Example (Address Match Mode)
Define Inbound Region n (4 ≥ n ≥ 0) as MEM region matching TLPs with address in the range (see also the iATU
Address Region Mapping: 64-bit Address Outbound and Inbound (Address Match Mode figure):
• From {PCIE_MSTARTH, PCIE_MSTARTHL} to {PCIE_MSTARTH, PCIE_MSTARTHL} + 0xFF_FFFF
• SOC MEM Region
• From 0x8000_0000 to 0x80FF_FFFF
Configure the PCIE_IATU_VWPRT_[n]
region.
29–34
PCIE_IATU_LTADDR_INB_[n]
PCIE_IATU_UTADDR_INB_[n]
PCIE_IATU_CTL1_INB_[n]
PCIE_IATU_CTL2_INB_[n]
UNTRANSLATED
ADDRESS MAP
REGION #N
START ADDRESS
0
BAR#x 0
* IS log2(CX_ATU_MIN_REGION_SIZE)
register to region n to access the IATU configuration registers of this
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register to set the lower target address.
register to set the upper target address.
register to define the type of the region to be
register to enable the region for BAR match for
REGION SIZE = SET BY THE BAR MASK
OF THE MATCHED BAR 1
TRANSLATED
ADDRESS MAP
x = MATCHED BAR NUMBER
REGION #N
THE RESULTING TRANSLATED ADDRESS
SPACE CAN BE 64 BITS OR 32 BITS
63
31 0
0x00000000
UPPER TARGET ADDRESS
eATU REGION #N REGISTER
0
31 0
0x0000
*
LOWER TARGET ADDRESS
eATU REGION #N REGISTER