Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 933

Intel® Management Engine Interface (MEI) Subsystem Registers (D22:F0)
23.10.8 KTLCR—KT Line Control Register (KT—D23:F3)
Address Offset: 03h
Default Value:
The line control register specifies the format of the asynchronous data communications
exchange and sets the DLAB bit. Most bits in this register have no affect on hardware
and are only used by the FW.
Bit
7
6
5:4
3
2
1:0
23.10.9 KTMCR—KT Modem Control Register (KT—D23:F3)
Address Offset: 04h
Default Value:
The Modem Control Register controls the interface with the modem. Since the FW
emulates the modem, the Host communicates to the FW using this register. Register
has impact on hardware when the Loopback mode is on.
Bit
7:5
4
3
2
1
0
Datasheet
00h
Divisor Latch Address Bit (DLAB)— R/W. This bit is set when the Host wants to
read/write the Divisor Latch LSB and MSB Registers. This bit is cleared when the Host
wants to access the Receive Buffer Register or the Transmit Holding Register or the
Interrupt Enable Register.
Break Control (BC)— R/W. This bit has no affect on hardware.
Parity Bit Mode (PBM)— R/W. This bit has no affect on hardware.
Parity Enable (PE)— R/W.This bit has no affect on hardware.
Stop Bit Select (SBS)— R/W. This bit has no affect on hardware.
Word Select Byte (WSB)— R/W. This bit has no affect on hardware.
00h
Reserved
Loop Back Mode (LBM)— R/W. When set by the Host, this bit indicates that the
serial port is in loop Back mode. This means that the data that is transmitted by the
host should be received. Helps in debug of the interface.
Output 2 (OUT2)— R/W. This bit has no affect on hardware in normal mode. In loop
back mode the value of this bit is written by hardware to the Modem Status Register
bit 7.
Output 1 (OUT1)— R/W. This bit has no affect on hardware in normal mode. In loop
back mode the value of this bit is written by hardware to Modem Status Register bit
6.
Request to Send Out (RTSO)— R/W. This bit has no affect on hardware in normal
mode. In loopback mode, the value of this bit is written by hardware to Modem Status
Register bit 4.
Data Terminal Ready Out (DRTO)— R/W. This bit has no affect on hardware in
normal mode. In loopback mode, the value in this bit is written by hardware to
Modem Status Register Bit 5.
Attribute: R/W
Size: 8 bits
Description
Attribute: R/W
Size: 8 bits
Description
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