Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 16

14.3.2.3 PxSERR—Serial ATA Error Register (D31:F2)............................... 586
14.4 AHCI Registers (D31:F2) .................................................................................. 588
14.4.1 AHCI Generic Host Control Registers (D31:F2).......................................... 589
14.4.1.1 CAP—Host Capabilities Register (D31:F2) ................................... 590
14.4.1.2 GHC—Global PCH Control Register (D31:F2) ............................... 592
14.4.1.3 IS—Interrupt Status Register (D31:F2) ...................................... 593
14.4.1.4 PI—Ports Implemented Register (D31:F2) .................................. 594
14.4.1.5 VS—AHCI Version (D31:F2) ...................................................... 595
14.4.1.6 EM_LOC—Enclosure Management Location Register (D31:F2)........ 595
14.4.1.7 EM_CTRL—Enclosure Management Control Register (D31:F2)........ 596
14.4.1.8 CAP2—HBA Capabilities Extended .............................................. 597
14.4.1.9 VSP—Vendor Specific (D31:F2) ................................................. 597
14.4.1.10Intel
14.4.2 Port Registers (D31:F2) ......................................................................... 599
14.4.2.1 PxCLB—Port [5:0] Command List Base Address Register
14.4.2.2 PxCLBU—Port [5:0] Command List Base Address Upper
14.4.2.3 PxFB—Port [5:0] FIS Base Address Register (D31:F2) .................. 603
14.4.2.4 PxFBU—Port [5:0] FIS Base Address Upper 32-Bits
14.4.2.5 PxIS—Port [5:0] Interrupt Status Register (D31:F2) .................... 604
14.4.2.6 PxIE—Port [5:0] Interrupt Enable Register (D31:F2) .................... 605
14.4.2.7 PxCMD—Port [5:0] Command Register (D31:F2) ......................... 607
14.4.2.8 PxTFD—Port [5:0] Task File Data Register (D31:F2)..................... 610
14.4.2.9 PxSIG—Port [5:0] Signature Register (D31:F2) ........................... 610
14.4.2.10PxSSTS—Port [5:0] Serial ATA Status Register (D31:F2) .............. 611
14.4.2.11PxSCTL — Port [5:0] Serial ATA Control Register (D31:F2) ........... 612
14.4.2.12PxSERR—Port [5:0] Serial ATA Error Register (D31:F2) ................ 613
14.4.2.13PxSACT—Port [5:0] Serial ATA Active (D31:F2) ........................... 615
14.4.2.14PxCI—Port [5:0] Command Issue Register (D31:F2) .................... 615
15 SATA Controller Registers (D31:F5) ....................................................................... 617
15.1 PCI Configuration Registers (SATA–D31:F5) ........................................................ 617
15.1.1 VID—Vendor Identification Register (SATA—D31:F5) ................................. 618
15.1.2 DID—Device Identification Register (SATA—D31:F5) ................................. 618
15.1.3 PCICMD—PCI Command Register (SATA–D31:F5) ..................................... 619
15.1.4 PCISTS — PCI Status Register (SATA–D31:F5) ......................................... 620
15.1.5 RID—Revision Identification Register (SATA—D31:F5) ............................... 620
15.1.6 PI—Programming Interface Register (SATA–D31:F5) ................................. 621
15.1.7 SCC—Sub Class Code Register (SATA–D31:F5) ......................................... 621
15.1.8 BCC—Base Class Code Register
(SATA–D31:F5SATA–D31:F5)................................................................. 621
15.1.9 PMLT—Primary Master Latency Timer Register
(SATA–D31:F5) .................................................................................... 622
15.1.10PCMD_BAR—Primary Command Block Base Address
Register (SATA–D31:F5)........................................................................ 622
15.1.11PCNL_BAR—Primary Control Block Base Address Register
(SATA–D31:F5) .................................................................................... 622
15.1.12SCMD_BAR—Secondary Command Block Base Address
Register (SATA D31:F5) ........................................................................ 623
15.1.13SCNL_BAR—Secondary Control Block Base Address
Register (SATA D31:F5) ........................................................................ 623
15.1.14BAR — Legacy Bus Master Base Address Register
(SATA–D31:F5) .................................................................................... 624
15.1.15SIDPBA — SATA Index/Data Pair Base Address Register
(SATA–D31:F5) .................................................................................... 624
15.1.16SVID—Subsystem Vendor Identification Register
(SATA–D31:F5) .................................................................................... 625
15.1.17SID—Subsystem Identification Register (SATA–D31:F5)............................. 625
15.1.18CAP—Capabilities Pointer Register (SATA–D31:F5) .................................... 625
15.1.19INT_LN—Interrupt Line Register (SATA–D31:F5)....................................... 625
15.1.20INT_PN—Interrupt Pin Register (SATA–D31:F5) ........................................ 625
15.1.21IDE_TIM — IDE Timing Register (SATA–D31:F5) ....................................... 626
15.1.22PID—PCI Power Management Capability Identification
Register (SATA–D31:F5)........................................................................ 626
16
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RST Feature Capabilities ................................................. 598
(D31:F2)................................................................................ 602
32-Bits Register (D31:F2) ........................................................ 602
Register (D31:F2) ................................................................... 603
Datasheet