Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 23

19.1.8 BCC—Base Class Code Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7/F6/F7)............................... 762
19.1.9 CLS—Cache Line Size Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7/F6/F7)............................... 763
19.1.10PLT—Primary Latency Timer Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7/F6/F7)............................... 763
19.1.11HEADTYP—Header Type Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7/F6/F7)............................... 763
19.1.12BNUM—Bus Number Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7/F6/F7)............................... 764
19.1.13SLT—Secondary Latency Timer
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7/F6/F7)............................... 764
19.1.14IOBL—I/O Base and Limit Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7/F6/F7)............................... 764
19.1.15SSTS—Secondary Status Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7/F6/F7)............................... 765
19.1.16MBL—Memory Base and Limit Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7/F6/F7)............................... 766
19.1.17PMBL—Prefetchable Memory Base and Limit Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7/F6/F7)............................... 766
19.1.18PMBU32—Prefetchable Memory Base Upper 32 Bits
Register (PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7/F6/F7) .................. 767
19.1.19PMLU32—Prefetchable Memory Limit Upper 32 Bits
Register (PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7/F6/F7) .................. 767
19.1.20CAPP—Capabilities List Pointer Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7/F6/F7)............................... 767
19.1.21INTR—Interrupt Information Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7/F6/F7)............................... 768
19.1.22BCTRL—Bridge Control Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7/F6/F7)............................... 769
19.1.23CLIST—Capabilities List Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)........................................ 770
19.1.24XCAP—PCI Express* Capabilities Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)........................................ 770
19.1.25DCAP—Device Capabilities Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)........................................ 771
19.1.26DCTL—Device Control Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)........................................ 772
19.1.27DSTS—Device Status Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)........................................ 773
19.1.28LCAP—Link Capabilities Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)........................................ 774
19.1.29LCTL—Link Control Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)........................................ 776
19.1.30LSTS—Link Status Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)........................................ 777
19.1.31SLCAP—Slot Capabilities Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)........................................ 778
19.1.32SLCTL—Slot Control Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)........................................ 779
19.1.33SLSTS—Slot Status Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)........................................ 780
19.1.34RCTL—Root Control Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)........................................ 781
19.1.35RSTS—Root Status Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)........................................ 781
19.1.36DCAP2—Device Capabilities 2 Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)........................................ 782
19.1.37DCTL2—Device Control 2 Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)........................................ 782
19.1.38LCTL2—Link Control 2 Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)........................................ 783
19.1.39MID—Message Signaled Interrupt Identifiers Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)........................................ 783
19.1.40MC—Message Signaled Interrupt Message Control Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)........................................ 783
Datasheet 23