Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 636

15.3 Serial ATA Index/Data Pair Superset Registers
All of these I/O registers are in the core well. They are exposed only when SCC is 01h
(that is, IDE programming interface) and the controller is not in combined mode. These
are Index/Data Pair registers that are used to access the SerialATA superset registers
(SerialATA Status, SerialATA Control and SerialATA Error). The I/O space for these
registers is allocated through SIDPBA. Locations with offset from 08h to 0Fh are
reserved for future expansion. Software-write operations to the reserved locations shall
have no effect while software-read operations to the reserved locations shall return 0.
15.3.1 SINDX—SATA Index Register (D31:F5)
Address Offset: SIDPBA + 00h
Default Value:
Note: These are Index/Data Pair Registers that are used to access the SSTS, SCTL, and
SERR. The I/O space for these registers is allocated through SIDPBA.
Bit
31:16 Reserved
controller at which the port-specific SSTS, SCTL, and SERR registers are located.
00h = Primary Master (Port 4)
15:8
02h = Secondary Master (Port 5)
All other values are Reserved.
Register Index (RIDX)— R/W. This Index field is used to specify one out of three
registers currently being indexed into.
00h = SSTS
7:0
01h = SCTL
02h = SERR
All other values are Reserved
15.3.2 SDATA—SATA Index Data Register (D31:F5)
Address Offset: SIDPBA + 04h
Default Value:
Note: These are Index/Data Pair Registers that are used to access the SSTS, SCTL, and
SERR. The I/O space for these registers is allocated through SIDPBA.
Bit
Data (DATA)— R/W. This Data register is a "window" through which data is read or
written to the memory mapped registers. A read or write to this Data register triggers a
corresponding read or write to the memory mapped register pointed to by the Index
register. The Index register must be setup prior to the read or write to this Data
register.
31:0
Note that a physical register is not actually implemented as the data is actually stored
in the memory mapped registers.
Since this is not a physical register, the "default" value is the same as the default value
of the register pointed to by Index.
636
00000000h
Port Index (PIDX)— R/W. This Index field is used to specify the port of the SATA
All bits undefined
SATA Controller Registers (D31:F5)
Attribute: R/W
Size: 32 bits
Description
Attribute: R/W
Size: 32 bits
Description
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