Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 382

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23:20
19:16
15:12
11:8
7:4
3:0
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PCI Express* #6 Pin (P6IP) — R/W. Indicates which pin the PCI Express* port #6
drives as its interrupt.
0h = No interrupt
1h = INTA#
2h = INTB# (Default)
3h = INTC#
4h = INTD#
5h–7h = Reserved
PCI Express #5 Pin (P5IP) — R/W. Indicates which pin the PCI Express port #5
drives as its interrupt.
0h = No interrupt
1h = INTA# (Default)
2h = INTB#
3h = INTC#
4h = INTD#
5h–7h = Reserved
PCI Express #4 Pin (P4IP) — R/W. Indicates which pin the PCI Express* port #4
drives as its interrupt.
0h = No interrupt
1h = INTA#
2h = INTB#
3h = INTC#
4h = INTD# (Default)
5h–7h = Reserved
PCI Express #3 Pin (P3IP) — R/W. Indicates which pin the PCI Express port #3
drives as its interrupt.
0h = No interrupt
1h = INTA#
2h = INTB#
3h = INTC# (Default)
4h = INTD#
5h–7h = Reserved
PCI Express #2 Pin (P2IP) — R/W. Indicates which pin the PCI Express port #2
drives as its interrupt.
0h = No interrupt
1h = INTA#
2h = INTB# (Default)
3h = INTC#
4h = INTD#
5h–7h = Reserved
PCI Express #1 Pin (P1IP) — R/W. Indicates which pin the PCI Express port #1
drives as its interrupt.
0h = No interrupt
1h = INTA# (Default)
2h = INTB#
3h = INTC#
4h = INTD#
5h–7h = Reserved
Chipset Configuration Registers
Description
Datasheet

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