Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 923

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Intel® Management Engine Interface (MEI) Subsystem Registers (D22:F0)
23.9.1
VVID—Vendor Identification Register (KT—D22:F3)
Address Offset: 00–01h
Default Value:
Bit
15:0
23.9.2
DID—Device Identification Register (KT—D22:F3)
Address Offset: 02–03h
Default Value:
Bit
31:16
23.9.3
CMD—Command Register Register (KT—D22:F3)
Address Offset: 04–05h
Default Value:
Bit
15:11
10
9:3
2
1
0
Datasheet
8086h
Vendor ID (VID) — RO. This is a 16-bit value assigned by Intel.
See bit description
Device ID (DID) — RO. This is a 16-bit value assigned to the PCH KT controller. See
®
the Intel
6 Series Chipset Specification Update for the value of the DID Register.
0000h
Reserved
Interrupt Disable (ID)— R/W. This bit disables pin-based INTx# interrupts. This bit
has no effect on MSI operation.
1 = Internal INTx# messages will not be generated.
0 = Internal INTx# messages are generated if there is an interrupt and MSI is not
enabled.
Reserved
Bus Master Enable (BME)— R/W. This bit controls the KT function's ability to act as
a master for data transfers. This bit does not impact the generation of completions
for split transaction commands. For KT, the only bus mastering activity is MSI
generation.
Memory Space Enable (MSE)— R/W. This bit controls Access to the PT function's
target memory space.
I/O Space enable (IOSE)— R/W. This bit controls access to the PT function's target
I/O space.
Attribute:
RO
Size:
16 bits
Description
Attribute:
RO
Size:
16 bits
Description
Attribute:
RO, R/W
Size:
16 bits
Description
923

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