Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 423

PCI-to-PCI Bridge Registers (D30:F0)
11.1.13 MEMBASE_LIMIT—Memory Base and Limit Register
(PCI-PCI—D30:F0)
Offset Address: 20h–23h
Default Value:
This register defines the base and limit, aligned to a 1-MB boundary, of the non-
prefetchable memory area of the bridge. Accesses that are within the ranges specified
in this register will be sent to PCI if CMD.MSE is set. Accesses from PCI that are outside
the ranges specified will be accepted by the bridge if CMD.BME is set.
Bit
31:20
19:16
15:4
3:0
11.1.14 PREF_MEM_BASE_LIMIT—Prefetchable Memory Base
and Limit Register (PCI-PCI—D30:F0)
Offset Address: 24h–27h
Default Value:
Defines the base and limit, aligned to a 1-MB boundary, of the prefetchable memory
area of the bridge. Accesses that are within the ranges specified in this register will be
sent to PCI if CMD.MSE is set. Accesses from PCI that are outside the ranges specified
will be accepted by the bridge if CMD.BME is set.
Bit
31:20
19:16
15:4
3:0
Datasheet
00000000h
Memory Limit (ML) — R/W. These bits are compared with bits 31:20 of the incoming
address to determine the upper 1-MB aligned value (exclusive) of the range. The
incoming address must be less than this value.
Reserved
Memory Base (MB) — R/W. These bits are compared with bits 31:20 of the incoming
address to determine the lower 1-MB aligned value (inclusive) of the range. The
incoming address must be greater than or equal to this value.
Reserved
00010001h
Prefetchable Memory Limit (PML)
of the incoming address to determine the upper 1-MB aligned value (exclusive) of the
range. The incoming address must be less than this value.
—
64-bit Indicator (I64L)
Prefetchable Memory Base (PMB)
of the incoming address to determine the lower 1-MB aligned value (inclusive) of the
range. The incoming address must be greater than or equal to this value.
—
64-bit Indicator (I64B)
Attribute:
Size:
Description
Attribute:
Size:
Description
—
R/W. These bits are compared with bits 31:20
RO. Indicates support for 64-bit addressing.
—
R/W. These bits are compared with bits 31:20
RO. Indicates support for 64-bit addressing.
R/W
32 bits
R/W, RO
32-bit
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