Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 42

Table 1-1. Industry Specifications (Sheet 2 of 2)
Alert Standard Format Specification, Version 1.03
IEEE 802.3 Fast Ethernet
AT Attachment - 6 with Packet Interface (ATA/ATAPI -
6)
IA-PC HPET (High Precision Event Timers) Specification,
Revision 1,0a
TPM Specification 1.02, Level 2 Revision 103
®
Intel Virtualization Technology
Chapter 1, "Introduction"
Chapter 1
gives a general overview of the PCH.
Chapter 2, "Signal Description"
Chapter 2
signal. Signals are arranged according to interface and details are provided as to the
drive characteristics (Input/Output, Open Drain, etc.) of all signals.
Chapter 3, "PCH Pin States"
Chapter 3
level in each suspend state, and their logic level before and after reset.
Chapter 4, "PCH and System Clocks"
Chapter 4
Chapter 5, "Functional Description"
Chapter 5
Chapter 6, "Ballout Definition"
Chapter 6
Mobile packages.
Chapter 7, "Package Information"
Chapter 7
Desktop and Mobile packages.
Chapter 8, "Electrical Characteristics"
Chapter 8
Chapter 9, "Register and Memory Mapping"
Chapter 9
and memory ranges decoded by the PCH.
Chapter 10, "Chipset Configuration Registers"
Chapter 10
related to chipset configuration. It contains the root complex register block, which
describes the behavior of the upstream internal link.
42
Specification
introduces the PCH and provides information on manual organization and
provides a block diagram of the PCH and a detailed description of each
provides a complete list of signals, their associated power well, their logic
provides a list of each clock domain associated with the PCH.
provides a detailed description of the functions in the PCH.
provides the ball assignment table and the ball-map for the Desktop and
provides drawings of the physical dimensions and characteristics of the
provides all AC and DC characteristics including detailed timing diagrams.
provides an overview of the registers, fixed I/O ranges, variable I/O ranges
provides a detailed description of registers and base functionality that is
Location
http://www.dmtf.org/standards/asf
http://standards.ieee.org/
getieee802/
http://T13.org (T13 1410D)
http://www.intel.com/
hardwaredesign/hpetspec_1.pdf
http://
www.trustedcomputinggroup.org/
specs/TPM
http://www.intel.com/technology/
virtualization/index.htm
Introduction
Datasheet