Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 647

EHCI Controller Registers (D29:F0, D26:F0)
16.1.12 SVID—USB EHCI Subsystem Vendor ID Register
(USB EHCI—D29:F0, D26:F0)
Address Offset: 2Ch
Default Value:
Reset:
Bit
15:0
16.1.13 SID—USB EHCI Subsystem ID Register
(USB EHCI—D29:F0, D26:F0)
Address Offset: 2Eh
Default Value:
Reset:
Bit
15:0
16.1.14 CAP_PTR—Capabilities Pointer Register
(USB EHCI—D29:F0, D26:F0)
Address Offset: 34h
Default Value:
Bit
Capabilities Pointer (CAP_PTR) — RO. This register points to the starting offset of
7:0
the USB 2.0 capabilities ranges.
16.1.15 INT_LN—Interrupt Line Register
(USB EHCI—D29:F0, D26:F0)
Address Offset: 3Ch
Default Value:
Function Level Reset: No
Bit
Interrupt Line (INT_LN) — R/W. This data is not used by the PCH. It is used as a
7:0 scratchpad register to communicate to software the interrupt line that the interrupt pin
is connected to.
Datasheet
2Dh
–
XXXXh
None
Subsystem Vendor ID (SVID) — R/W. This register, in combination with the USB 2.0
Subsystem ID register, enables the operating system to distinguish each subsystem
from the others.
NOTE: Writes to this register are enabled when the WRT_RDONLY bit (D29:F0,
D26:F0:80h, bit 0) is set to 1.
2Fh
–
XXXXh
None
Subsystem ID (SID) — R/W. BIOS sets the value in this register to identify the
Subsystem ID. This register, in combination with the Subsystem Vendor ID register,
enables the operating system to distinguish each subsystem from other(s).
NOTE: Writes to this register are enabled when the WRT_RDONLY bit (D29:F0,
D26:F0:80h, bit 0) is set to 1.
50h
00h
Attribute: R/W
Size: 16 bits
Description
Attribute: R/W
Size: 16 bits
Description
Attribute: RO
Size: 8 bits
Description
Attribute: R/W
Size: 8 bits
Description
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