Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 471

LPC Interface Bridge Registers (D31:F0)
13.1.36 FVECIDX—Feature Vector Index
(LPC I/F—D31:F0)
Offset Address: E4h–E7h
Default Value:
Bit
31:6
5:2
1:0
13.1.37 FVECD—Feature Vector Data
(LPC I/F—D31:F0)
Offset Address: E8h–EBh
Default Value:
Bit
31:0
13.1.38 Feature Vector Space
13.1.38.1 FVEC0—Feature Vector Register 0
FVECIDX.IDX:
Default Value:
Bit
31:12
11:10
9:8
7
6
5:4
Datasheet
00000000h
Reserved
Index (IDX) — R/W. 4-bit index pointer into the 64-byte Feature Vector space. Data
is read from the FVECD register. This points to a DWord register.
Reserved
See Description
Data (DATA) — RO. 32-bit data value that is read from the Feature Vector offset
pointed to by FVECIDX.
0000b
See Description
Reserved
USB Port Count Capability — RO
00 = 14 ports
01 = 12 ports
10 = 10 ports
11 = Reserved
Reserved
RAID Capability — RO
0 = Disabled
1 = Capable
SATA Ports 2 and 3 — RO
0 = Capable
1 = Disabled
Reserved
Attribute: R/W
Size: 32 bit
Power Well: Core
Description
Attribute: RO
Size: 32 bit
Power Well: Core
Description
Attribute: RO
Size: 32 bit
Power Well: Core
Description
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