Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 903

Intel® Management Engine Interface (MEI) Subsystem Registers (D22:F0)
23.6 IDE BAR0
Table 23-5. IDE BAR0 Register Address Map
Address
Offset
0h
1h
1h
1h
2h
2h
2h
3h
3h
3h
4h
4h
4h
5h
5h
5h
6h
6h
6h
7h
7h
7h
Datasheet
Register
Symbol
IDEDATA IDE Data Register
IDEERD1 IDE Error Register DEV1
IDEERD0 IDE Error Register DEV0
IDEFR IDE Features Register
IDESCIR IDE Sector Count In Register
IDESCOR1 IDE Sector Count Out Register Device 1
IDESCOR0 IDE Sector Count Out Register Device 0
IDESNOR0 IDE Sector Number Out Register Device 0
IDESNOR1 IDE Sector Number Out Register Device 1
IDESNIR IDE Sector Number In Register
IDECLIR IDE Cylinder Low In Register
IDCLOR1 IDE Cylinder Low Out Register Device 1
IDCLOR0 IDE Cylinder Low Out Register Device 0
IDCHOR0 IDE Cylinder High Out Register Device 0
IDCHOR1 IDE Cylinder High Out Register Device 1
IDECHIR IDE Cylinder High In Register
IDEDHIR IDE Drive/Head In Register
IDDHOR1 IDE Drive Head Out Register Device 1
IDDHOR0 IDE Drive Head Out Register Device 0
IDESD0R IDE Status Device 0 Register
IDESD1R IDE Status Device 1 Register
IDECR IDE Command Register
Register Name
Default
Attribute
Value
00h R/W
00h R/W
00h R/W
00h R/W
00h R/W
00h R/W
00h R/W
00h R/W
00h R/W
00h R/W
00h R/W
00h R/W
00h R/W
00h R/W
00h R/W
00h R/W
00h R/W
00h R/W
00h R/W
80h R/W
80h R/W
00h R/W
903