Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 18

16.1.20PWR_CNTL_STS—Power Management Control/
Status Register (USB EHCI—D29:F0, D26:F0) .......................................... 650
16.1.21DEBUG_CAPID—Debug Port Capability ID Register
(USB EHCI—D29:F0, D26:F0)................................................................. 651
16.1.22NXT_PTR2—Next Item Pointer #2 Register
(USB EHCI—D29:F0, D26:F0)................................................................. 651
16.1.23DEBUG_BASE—Debug Port Base Offset Register
(USB EHCI—D29:F0, D26:F0)................................................................. 651
16.1.24USB_RELNUM—USB Release Number Register
(USB EHCI—D29:F0, D26:F0)................................................................. 651
16.1.25FL_ADJ—Frame Length Adjustment Register
(USB EHCI—D29:F0, D26:F0)................................................................. 652
16.1.26PWAKE_CAP—Port Wake Capability Register
(USB EHCI—D29:F0, D26:F0)................................................................. 653
16.1.27LEG_EXT_CAP—USB EHCI Legacy Support Extended
Capability Register (USB EHCI—D29:F0, D26:F0)...................................... 654
16.1.28LEG_EXT_CS—USB EHCI Legacy Support Extended
Control / Status Register (USB EHCI—D29:F0, D26:F0) ............................. 655
16.1.29SPECIAL_SMI—Intel Specific USB 2.0 SMI Register
(USB EHCI—D29:F0, D26:F0)................................................................. 657
16.1.30ACCESS_CNTL—Access Control Register
(USB EHCI—D29:F0, D26:F0)................................................................. 658
16.1.31EHCIIR1—EHCI Initialization Register 1
(USB EHCI—D29:F0, D26:F0)................................................................. 658
16.1.32FLR_CID—Function Level Reset Capability ID
(USB EHCI—D29:F0, D26:F0)................................................................. 659
16.1.33FLR_NEXT—Function Level Reset Next Capability Pointer
(USB EHCI—D29:F0, D26:F0)................................................................. 659
16.1.34FLR_CLV—Function Level Reset Capability Length and Version
(USB EHCI—D29:F0, D26:F0)................................................................. 659
16.1.35FLR_CTRL—Function Level Reset Control Register
(USB EHCI—D29:F0, D26:F0)................................................................. 660
16.1.36FLR_STS—Function Level Reset Status Register
(USB EHCI—D29:F0, D26:F0)................................................................. 660
16.2 Memory-Mapped I/O Registers .......................................................................... 661
16.2.1 Host Controller Capability Registers......................................................... 661
16.2.1.1 CAPLENGTH—Capability Registers Length Register ....................... 662
16.2.1.2 HCIVERSION—Host Controller Interface Version Number
16.2.1.3 HCSPARAMS—Host Controller Structural Parameters .................... 662
16.2.1.4 HCCPARAMS—Host Controller Capability Parameters
16.2.2 Host Controller Operational Registers ...................................................... 664
16.2.2.1 USB2.0_CMD—USB 2.0 Command Register................................. 665
16.2.2.2 USB2.0_STS—USB 2.0 Status Register....................................... 668
16.2.2.3 USB2.0_INTR—USB 2.0 Interrupt Enable Register........................ 670
16.2.2.4 FRINDEX—Frame Index Register ............................................... 671
16.2.2.5 CTRLDSSEGMENT—Control Data Structure Segment
16.2.2.6 PERIODICLISTBASE—Periodic Frame List Base Address
16.2.2.7 ASYNCLISTADDR—Current Asynchronous List Address
16.2.2.8 CONFIGFLAG—Configure Flag Register ....................................... 673
16.2.2.9 PORTSC—Port N Status and Control Register............................... 674
16.2.3 USB 2.0-Based Debug Port Registers ....................................................... 678
16.2.3.1 CNTL_STS—Control/Status Register........................................... 679
16.2.3.2 USBPID—USB PIDs Register ..................................................... 681
16.2.3.3 DATABUF[7:0]—Data Buffer Bytes[7:0] Register ......................... 681
16.2.3.4 CONFIG—Configuration Register................................................ 681
17 Integrated Intel
®
17.1 Intel High Definition Audio Controller Registers (D27:F0) .................................... 683
17.1.1 Intel
(Intel
17.1.1.1 VID—Vendor Identification Register
18
Register ................................................................................. 662
Register ................................................................................. 663
Register ................................................................................. 672
Register ................................................................................. 672
Register ................................................................................. 673
®
High Definition Audio Controller Registers ................................. 683
®
High Definition Audio PCI Configuration Space
®
High Definition Audio— D27:F0)................................................... 683
®
(Intel High Definition Audio Controller—D27:F0)........................ 685
Datasheet