Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 386

10.1.39 D30IR—Device 30 Interrupt Route Register
Offset Address: 3142–3143h
Default Value:
Bit
15:0
10.1.40 D29IR—Device 29 Interrupt Route Register
Offset Address: 3144–3145h
Default Value:
Bit
15
14:12
11
10:8
7
6:4
3
2:0
386
0000h
Reserved. No interrupts generated from Device 30.
3210h
Reserved
Interrupt D Pin Route (IDR) — R/W. Indicates which physical pin on the PCH is
connected to the INTD# pin reported for device 29 functions.
0h = PIRQA#
1h = PIRQB#
2h = PIRQC#
3h = PIRQD# (Default)
4h = PIRQE#
5h = PIRQF#
6h = PIRQG#
7h = PIRQH#
Reserved
Interrupt C Pin Route (ICR) — R/W. Indicates which physical pin on the PCH is
connected to the INTC# pin reported for device 29 functions.
0h = PIRQA#
1h = PIRQB#
2h = PIRQC# (Default)
3h = PIRQD#
4h = PIRQE#
5h = PIRQF#
6h = PIRQG#
7h = PIRQH#
Reserved
Interrupt B Pin Route (IBR) — R/W. Indicates which physical pin on the PCH is
connected to the INTB# pin reported for device 29 functions.
0h = PIRQA#
1h = PIRQB# (Default)
2h = PIRQC#
3h = PIRQD#
4h = PIRQE#
5h = PIRQF#
6h = PIRQG#
7h = PIRQH#
Reserved
Interrupt A Pin Route (IAR) — R/W. Indicates which physical pin on the PCH is
connected to the INTA# pin reported for device 29 functions.
0h = PIRQA# (Default)
1h = PIRQB#
2h = PIRQC#
3h = PIRQD#
4h = PIRQE#
5h = PIRQF#
6h = PIRQG#
7h = PIRQH#
Chipset Configuration Registers
Attribute: RO
Size: 16-bit
Description
Attribute: R/W
Size: 16-bit
Description
Datasheet