Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 722

17.1.2.28 RIRBSTS—RIRB Status Register
®
(Intel
Memory Address:HDBAR + 5Dh
Default Value:
Bit
7:3 Reserved.
Response Overrun Interrupt Status — R/WC.
1 = Software sets this bit to 1 when the RIRB DMA engine is not able to write the
2
Software clears this bit by writing a 1 to it.
1 Reserved.
Response Interrupt — R/WC.
1 = Hardware sets this bit to 1 when an interrupt has been generated after N number
0
Software clears this bit by writing a 1 to it.
17.1.2.29 RIRBSIZE—RIRB Size Register
®
(Intel
Memory Address:HDBAR + 5Eh
Default Value:
Bit
RIRB Size Capability — RO. Hardwired to 0100b indicating that the PCH only supports
7:4
a RIRB size of 256 RIRB entries (2048B).
3:2 Reserved.
1:0 RIRB Size — RO. Hardwired to 10b which sets the CORB size to 256 entries (2048B).
17.1.2.30 IC—Immediate Command Register
®
(Intel
Memory Address:HDBAR + 60h
Default Value:
Bit
Immediate Command Write — R/W. The command to be sent to the codec using
the Immediate Command mechanism is written to this register. The command stored in
31:0
this register is sent out over the link during the next available frame after a 1 is written
to the ICB bit (HDBAR + 68h: bit 0).
722
High Definition Audio Controller—D27:F0)
00h
incoming responses to memory before additional incoming responses overrun the
internal FIFO. When the overrun occurs, the hardware will drop the responses
which overrun the buffer. An interrupt may be generated if the Response Overrun
Interrupt Control bit is set. Note that this status bit is set even if an interrupt is not
enabled for this event.
of Responses are sent to the RIRB buffer OR when an empty Response slot is
encountered on all SDI[x] inputs (whichever occurs first). Note that this status bit
is set even if an interrupt is not enabled for this event.
High Definition Audio Controller—D27:F0)
42h
High Definition Audio Controller—D27:F0)
00000000h
®
Integrated Intel High Definition Audio Controller Registers
Attribute:
Size:
Description
Attribute:
Size:
Description
Attribute:
Size:
Description
R/WC
8 bits
RO
8 bits
R/W
32 bits
Datasheet