Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 907

Hide thumbs Also See for 6 SERIES CHIPSET - DATASHEET 01-2011:
Table of Contents

Advertisement

Intel® Management Engine Interface (MEI) Subsystem Registers (D22:F0)
23.6.9
IDESNOR1—IDE Sector Number Out Register
Device 1 Register (IDER—D22:F2)
Address Offset: 03h
Default Value:
This register is read by the Host if DEV = 1. ME-Firmware writes to this register at the
end of a command of the selected device.
When the host writes to the IDE Sector Number In Register (IDESNIR), this register is
updated with that value.
Bit
7:0
23.6.10
IDESNIR—IDE Sector Number In Register Register
(IDER—D22:F2)
Address Offset: 03h
Default Value:
This register implements the Sector Number register of the command block of the IDE
function. This register can be written only by the Host. When host writes to this
register, all 3 registers (IDESNIR, IDESNOR0, IDESNOR1) are updated with the written
value.
Host read to this register address reads the IDE Sector Number Out Register
IDESNOR0 if DEV=0 or IDESNOR1 if DEV=1.
Bit
7:0
Datasheet
00h
IDE Sector Number Out DEV 1 (IDESNO1) — R/W. Sector Number Out register
for Slave device.
00h
IDE Sector Number Data (IDESND) — R/W. This register contains the number of
the first sector to be transferred.
Attribute:
R/W
Size:
8 bits
Description
Attribute:
R/W
Size:
8 bits
Description
907

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

6 series

Table of Contents