Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 437

Gigabit LAN Configuration Registers
12.1.5 RID—Revision Identification Register
(Gigabit LAN—D25:F0)
Offset Address: 08h
Default Value:
Bit
Revision ID — RO. See the Intel
7:0
of the RID Register.
12.1.6 CC—Class Code Register
(Gigabit LAN—D25:F0)
Address Offset: 09h
Default Value:
Bit
23:0
12.1.7 CLS—Cache Line Size Register
(Gigabit LAN—D25:F0)
Address Offset: 0Ch
Default Value:
Bit
7:0
12.1.8 PLT—Primary Latency Timer Register
(Gigabit LAN—D25:F0)
Address Offset: 0Dh
Default Value:
Bit
7:0
12.1.9 HT—Header Type Register
(Gigabit LAN—D25:F0)
Address Offset: 0Eh
Default Value:
Bit
7:0
Datasheet
See bit description
0Bh
–
020000h
Class Code— RO. Identifies the device as an Ethernet Adapter.
020000h = Ethernet Adapter.
00h
Cache Line Size — R/W. This field is implemented by PCI devices as a read write field
for legacy compatibility purposes but has no impact on any device functionality.
00h
Latency Timer (LT) — RO. Hardwired to 0.
00h
Header Type (HT) — RO.
00h = Indicates this is a single function device.
Attribute:
Size:
Description
®
6 Series Chipset Specification Update for the value
Attribute:
Size:
Description
Attribute:
Size:
Description
Attribute:
Size:
Description
Attribute:
Size:
Description
RO
8 bits
RO
24 bits
R/W
8 bits
RO
8 bits
RO
8 bits
437