Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 78

Table 2-23. Digital Display Interface Signals (Sheet 2 of 3)
Name
SDVO_CTRLDATA
SDVO_INTP
SDVO_INTN
SDVO_TVCLKINP
SDVO_TVCLKINN
SDVO_STALLP
SDVO_STALLN
DDPC_[3:0]P
DDPC_[3:0]N
DDPC_AUXP
DDPC_AUXN
DDPC_HPD
DDPC_CTRLCLK
DDPC_CTRLDATA
78
Type
I/O Port B: HDMI Control Data. Shared with Port B SDVO
I SDVO_INTP: Serial Digital Video Input Interrupt
I SDVO_INTN: Serial Digital Video Input Interrupt Complement.
SDVO_TVCLKINP: Serial Digital Video TVOUT Synchronization
I
Clock.
SDVO_TVCLKINN: Serial Digital Video TVOUT Synchronization
I
Clock Complement.
I SDVO_STALLP: Serial Digital Video Field Stall.
I SDVO_STALLN: Serial Digital Video Field Stall Complement.
Port C: Capable of HDMI / DVI / DP
HDMI / DVI Port C Data and Clock Lines
DDPC_[0]P: TMDSC_DATA2
DDPC_[1]P: TMDSC_DATA1
DDPC_[2]P: TMDSC_DATA0
O DDPC_[3]P: TMDSC_CLK
DisplayPort Port C
DDPC_[0]P: Display Port Lane 0
DDPC_[1]P: Display Port Lane 1
DDPC_[2]P: Display Port Lane 2
DDPC_[3]P: Display Port Lane 3
Port C: Capable of HDMI / DVI / DisplayPort
HDMI / DVI Port C Data and Clock Line Complements
DDPC_[0]N: TMDSC_DATA2B
DDPC_[1]N: TMDSC_DATA1B
DDPC_[2]N: TMDSC_DATA0B
O DDPC_[3]N: TMDSC_CLKB
DisplayPort Port C Complements
DDPC_[0]N: Lane 0 complement
DDPC_[1]N: Lane 1 complement
DDPC_[2]N: Lane 2 complement
DDPC_[3]N: Lane 3 complement
I/O Port C: Display Port Aux
I/O Port C: Display Port Aux Complement
I Port C: TMDSC_HPD Hot Plug Detect
I/O HDMI Port C Control Clock
I/O HDMI Port C Control Data
Signal Description
Description
Datasheet