Avaya DEFINITY Server CSI Maintenance Manual page 1539

PROCR (RISC Processor Circuit Pack TN2402/TN798)
System Technician-Demanded Tests: Descriptions
and Error Codes
Always investigate tests in the order presented in the table below. By clearing
error codes associated with the Processor Bus Time-out Exception Test, for
example, you may also clear errors generated from other tests in the testing
sequence.
Order of Investigation
Processor Cache Test (#895)
Processor Cache Audit (#896)
Processor Bus Time-out Exception Test (#82)
Processor BOOTPROM Checksum Test (#80)
Processor Write Buffer Test (#900)
Memory Burst Read Test (#908)(a)
Read All Memory Test (#85)(a)
Memory Parity Error Detection Test (#87)(a)
Flash Memory Checksum Test (#86)(a)
Memory Functional Test (#332) (a) (b)
MTP Outpulse Relay Test (#102) (c)
MTP External Modem Present Test (#230) (c)
MTP Analog Loop Around Test (#103) (c)
MTP Sanity Handshake Test (#106) (c)
MTP SAT Loop Around Test (#228) (c)
MTP Aux Loop Around Test (#229) (c)
MTP Reset Test (#101) (c)
MTP Dual Port Ram Test (#104) (c)
1. D = Destructive; ND = Nondestructive
Notes:
a. Refer to
b. There are Functional Memory Test errors against the Processor circuit
pack. This test is run only via a reset system 4 command or a reset system
5 command.
c. Refer to
tests.
555-233-119
Short Test
Sequence
''PR-MEM (RISC Memory)''
''PR-MAINT (Maintenance Processor)''
Long Test
Sequence
X
X X
X X
X X
X X
X X
X
X X
X
X
X X
X X
X X
X X
X X
X X
X
X
Continued on next page
for a description of these tests.
for a description of these
Issue 5 October 2002
1
D/ND
ND
ND
ND
ND
ND
ND
ND
ND
ND
D
ND
ND
ND
ND
ND
ND
D
D
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