Tdm-Clk (Tdm Bus Clock) - Avaya DEFINITY Server CSI Maintenance Manual

TDM-CLK (TDM Bus Clock)

TDM-CLK (TDM Bus Clock)
MO Name (in
Alarm Log)
TDM-CLK
TDM-CLK
TDM-CLK
1. P is the cabinet number (1). C is the carrier designation (A, B, or C).
NOTE:
Replacing the tone/clock circuit pack requires a special procedure described
in the documentation for TONE-BD. That section also describes the LED
displays for this board.
The Time Division Multiplex (TDM) Bus Clock resides on the Tone-Clock circuit
pack, providing clocking signals both for the TDM Bus and the LAN Bus. The
Tone-Clock circuit pack is a critical component in the system and is necessary to
ensure the operation of all port circuit packs in the system. The TDM buses of the
PPN are synchronized together. The system timing reference can be derived
internally from the Tone-Clock circuit pack, or from an external (off-board) timing
reference. Currently, the TDM Bus Clock supports synchronizing the TDM Bus
with interface rates from Digital Signal 1 (DS1) facilities as primary or primary and
secondary references.
Moreover, the Tone-Clock circuit pack aids in monitoring and selecting
synchronization references. The Tone-Clock circuit pack, after detecting that the
external source of timing is not valid, will automatically begin its escalation
procedure, according to the facilities administered.
NOTE:
Switching back to a DS1 source is handled by synchronization maintenance,
once any problems with it have been corrected and tested. However, once
synchronization has been switched to the internal timing source of the
master Tone-Clock circuit pack, switching back to a Stratum 3 Clock must be
initiated by a technician after the external reference has been repaired.
555-233-119
Alarm
Level Initial Command To Run
MAJOR test tone-clock PC short
MINOR test tone-clock PC short
WARNING release tone-clock PC
1
Full Name of MO
TDM Bus Clock
TDM Bus Clock
TDM Bus Clock
Issue 5 October 2002
1667