ST STM32G4 Series Reference Manual page 1744

Serial peripheral interface / inter-IC sound (SPI/I2S)
Bit 7 BSY: Busy flag
Note: The BSY flag must be used with caution: refer to
Bit 6 OVR: Overrun flag
Bit 5 MODF: Mode fault
Note: This bit is not used in I
Bit 4 CRCERR: CRC error flag
Note: This flag is set by hardware and cleared by software writing 0.
Bit 3 UDR: Underrun flag
Note: This bit is not used in SPI mode.
Bit 2 CHSIDE: Channel side
Note: This bit is not used in SPI mode. It has no significance in PCM mode.
Bit 1 TXE: Transmit buffer empty
Bit 0 RXNE: Receive buffer not empty
1744/2083
0: SPI (or I2S) not busy
1: SPI (or I2S) is busy in communication or Tx buffer is not empty
This flag is set and cleared by hardware.
Procedure for disabling the SPI on page
0: No overrun occurred
1: Overrun occurred
This flag is set by hardware and reset by a software sequence. Refer to
page 1737 for the software sequence.
0: No mode fault occurred
1: Mode fault occurred
This flag is set by hardware and reset by a software sequence. Refer to
(MODF) on page 1715 for the software sequence.
0: CRC value received matches the SPIx_RXCRCR value
1: CRC value received does not match the SPIx_RXCRCR value
This bit is not used in I
0: No underrun occurred
1: Underrun occurred
This flag is set by hardware and reset by a software sequence. Refer to
page 1737 for the software sequence.
0: Channel Left has to be transmitted or has been received
1: Channel Right has to be transmitted or has been received
0: Tx buffer not empty
1: Tx buffer empty
0: Rx buffer empty
1: Rx buffer not empty
1705.
2
S mode.
2
S mode.
RM0440 Rev 1
Section 38.5.10: SPI status flags
I2S error flags on
Section : Mode fault
I2S error flags on
RM0440
and