Figure 601. Example Of 16-Bit Data Frame Extended To 32-Bit Channel Frame; Figure 602. Pcm Standard Waveforms (16-Bit) - ST STM32G4 Series Reference Manual

Advanced arm-based 32-bit mcus

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Serial peripheral interface / inter-IC sound (SPI/I2S)

Figure 601. Example of 16-bit data frame extended to 32-bit channel frame

Only one access to the SPIx-DR register

In transmission mode, when a TXE event occurs, the application has to write the data to be

transmitted (in this case 0x76A3). The 0x000 field is transmitted first (extension on 32-bit).

The TXE flag is set again as soon as the effective data (0x76A3) is sent on SD.

In reception mode, RXNE is asserted as soon as the significant half-word is received (and

not the 0x0000 field).

In this way, more time is provided between two write or read operations to prevent underrun

or overrun conditions.

PCM standard

For the PCM standard, there is no need to use channel-side information. The two PCM

modes (short and long frame) are available and configurable using the PCMSYNC bit in

SPIx_I2SCFGR register.

In PCM mode, the output signals (WS, SD) are sampled on the rising edge of CK signal.

The input signals (WS, SD) are captured on the falling edge of CK.

Note that CK and WS are configured as output in MASTER mode.

For long frame synchronization, the WS signal assertion time is fixed to 13 bits in master

For short frame synchronization, the WS synchronization signal is only one cycle long.

RM0440 Rev 1

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