RM0440
suppression of spikes with a pulse width up to 50 ns in Fast-mode and Fast-mode Plus. The
user can disable this analog filter by setting the ANFOFF bit, and/or select a digital filter by
configuring the DNF[3:0] bit in the I2C_CR1 register.
When the digital filter is enabled, the level of the SCL or the SDA line is internally changed
only if it remains stable for more than DNF x I2CCLK periods. This allows to suppress
spikes with a programmable length of 1 to 15 I2CCLK periods.
Pulse width of
suppressed spikes
Benefits
Drawbacks
Caution:
Changing the filter configuration is not allowed when the I2C is enabled.
Table 370. Comparison of analog vs. digital filters
-
Analog filter
≥ 50 ns
Available in Stop mode
Variation vs. temperature,
voltage, process
Inter-integrated circuit (I2C) interface
Programmable length from 1 to 15 I2C peripheral
clocks
– Programmable length: extra filtering capability
vs. standard requirements
– Stable length
Wakeup from Stop mode on address match is not
available when digital filter is enabled
RM0440 Rev 1
Digital filter
1821/2083
1885
Need help?
Do you have a question about the STM32G4 Series and is the answer not in the manual?