Figure 616. Start-Up Sequence - ST STM32G4 Series Reference Manual

Serial audio interface (SAI)
Enabling the PDM interface
To enable the PDM interface, follow the sequence below:
1. Configure SAI_A in TDM master mode (see
2. Configure the PDM interface as follows:
a)
b)
3. Enable the PDM interface, via PDMEN bit.
4. Enable the SAI_A.
Note: Once the PDM interface and SAI_A are enabled, the first 2 TDMA frames received on
SAI_ADR are invalid and shall be dropped.
Start-up sequence
Figure 616
frame synchronization event prior to starting the acquisition of the microphone samples.
After 8 SAI_CK clock periods, a data byte coming from each microphone is available, and
transferred to the SAI, via the TDM interface.
Pdm_ck
saia_clk_out
saia_sd_in
saia_fs_out
PDMEN
SAIEN
Wait for frame
SAI_ADR data format
The arrangement of the data coming from the microphone into the SAI_ADR register
depends on the following parameters:
•
The amount of microphones
•
The slot width selected
•
LSBFIRST bit.
The slot width defines the amount of significant bits into each word available into the
SAI_ADR.
When a slot width of 32 bits is selected, each data available into the SAI_ADR will contain
32 useful bits. This reduces the amount of words stored into the memory. However the
1768/2083
Define the number of digital microphones via MICNBR.
Enable the bitstream clock needed in the application by setting the corresponding
bits on CKEN to 1.
shows the start-up sequence: Once the PDM interface is enabled, it waits for the

Figure 616. Start-up sequence

1 2 3 4 5 6 7
Don't care
N
Frame sync is detected, waiting
for receiving 8 bits from each
sync.
microphone
Table
8 1 2 3 4 5 6 7
M1L-x M1R-x M2L-x
N+1
Transmission to SAI of the data received
on frame N, and acquisition of the next
8 bits from each microphone.
No re-sync with the frame sync
RM0440 Rev 1
360).
8 1 2 3 4 5 6 7
M2R-x M1L-y M1R-y
N+2
Transmission to SAI of the data received
on frame N+1, and acquisition of the next
8 bits from each microphone.
No re-sync with the frame sync
RM0440
8
M2L-y M2R-y
MSv35469V2