Table 362. Sopd Pattern; Table 363. Parity Bit Calculation; Figure 622. Sai_Xdr Register Ordering - ST STM32G4 Series Reference Manual

Serial audio interface (SAI)
SOPD
B
W
M
The data stored in SAI_xDR has to be filled as follows:
•
SAI_xDR[26:24] contain the Channel status, User and Validity bits.
•
SAI_xDR[23:0] contain the 24-bit data for the considered channel.
If the data size is 20 bits, then data shall be mapped on SAI_xDR[23:4].
If the data size is 16 bits, then data shall be mapped on SAI_xDR[23:8].
SAI_xDR[23] always represents the MSB.
26
CS U
Note: The transfer is performed always with LSB first.
The SAI first sends the adequate preamble for each sub-frame in a block. The SAI_xDR is
then sent on the SD line (manchester coded). The SAI ends the sub-frame by transferring
the Parity bit calculated as described in
The underrun is the only error flag available in the SAI_xSR register for SPDIF mode since
the SAI can only operate in transmitter mode. As a result, the following sequence should be
1776/2083
Preamble coding
last bit is 0
11101000
11100100
11100010

Figure 622. SAI_xDR register ordering

V D23 D22 D21 D20 D19 D18 D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7
Status
bits

Table 363. Parity bit calculation

SAI_xDR[26:0]
odd number of 0
odd number of 1

Table 362. SOPD pattern

last bit is 1
00010111 Channel A data at the start of block
00011011 Channel B data somewhere in the block
00011101 Channel A data
SAI_xDR[26:0]
Data[23:0]
Table 363.
RM0440 Rev 1
Description
D6 D5 D4 D3 D2 D1 D0
Parity bit P value transferred
0
1
RM0440
0
MSv31174V1