Questionable Frequency Positive Transition - Keysight x-series User Reference Manual

Remote Command
Example
Preset
Min
Max
Status Bits/OPC
dependencies
Initial S/W Revision

Questionable Frequency Positive Transition

This command determines which bits in the Questionable Frequency Condition register will set the
corresponding bit in the Questionable Frequency Event register when the condition register bit has a
positive transition (0 to 1). The variable <integer> is the sum of the decimal values of the bits that you want
to enable.
Mode
Remote Command
Example
Preset
Min
Max
Status Bits/OPC
dependencies
Initial S/W Revision
Questionable Integrity Register
"Questionable Integrity Condition " on page 127
"Questionable Integrity Enable " on page 128
"Questionable Integrity Event Query " on page 128
"Questionable Integrity Negative Transition " on page 129
"Questionable Integrity Positive Transition " on page 129
Questionable Integrity Condition
This query returns the decimal value of the sum of the bits in the Questionable Integrity Condition register.
EMI Receiver Mode Reference
:STATus:QUEStionable:FREQuency:NTRansition <integer>
:STATus:QUEStionable:FREQuency:NTRansition?
STAT:QUES:FREQ:NTR 2 Frequency Reference 'regained lock' will be reported to the Frequency
Summary of the Status Questionable register.
0
0
32767
Sequential command
Prior to A.02.00
All
:STATus:QUEStionable:FREQuency:PTRansition <integer>
:STATus:QUEStionable:FREQuency:PTRansition?
STAT:QUES:FREQ:PTR 2 Frequency Reference 'became unlocked' will be reported to the Frequency
Summary of the Status Questionable register.
32767
0
32767
Sequential command
Prior to A.02.00
3 Programming the Analyzer
STATus Subsystem
127