Motorola PowerQUICC II MPC8280 Series Reference Manual page 71

Table
Number
11-18 SDRAM Interface Signals ...................................................................................... 11-34
11-19 SDRAM Interface Commands ................................................................................ 11-38
11-20 SDRAM Address Multiplexing (A0–A15) ............................................................. 11-40
11-21 SDRAM Address Multiplexing (A16–A31) ........................................................... 11-40
11-22 60x Address Bus Partition....................................................................................... 11-52
11-23 SDRAM Device Address Port during
11-24 SDRAM Device Address Port during
11-25 Register Settings (Page-Based Interleaving)........................................................... 11-53
11-26 60x Address Bus Partition....................................................................................... 11-54
11-27 SDRAM Device Address Port during
11-28 SDRAM Device Address Port during
11-29 Register Settings (Bank-Based Interleaving).......................................................... 11-54
11-30 GPCM Interfaces Signals........................................................................................ 11-55
11-31 GPCM Strobe Signal Behavior ............................................................................... 11-56
11-32 TRLX and EHTR Combinations............................................................................. 11-62
11-33 Boot Bank Field Values after Reset ........................................................................ 11-66
11-34 UPM Interfaces Signals .......................................................................................... 11-66
11-35 UPM Routines Start Addresses............................................................................... 11-69
11-36 RAM Word Bit Settings .......................................................................................... 11-75
x
11-37 M MR Loop Field Usage ....................................................................................... 11-80
11-38 UPM Address Multiplexing .................................................................................... 11-81
11-39 60x Address Bus Partition....................................................................................... 11-85
11-40 DRAM Device Address Port during an activate command .................................... 11-85
11-41 Register Settings ..................................................................................................... 11-85
11-42 UPMs Attributes Example ...................................................................................... 11-87
11-43 UPMs Attributes Example ...................................................................................... 11-95
11-44 EDO Connection Field Value Example .................................................................. 11-97
13-1 TAP Signals............................................................................................................... 13-2
13-2 Instruction Decoding................................................................................................. 13-6
IV-i Acronyms and Abbreviated Terms............................................................................ IV-6
14-1 Possible MPC8280 Applications .............................................................................. 14-3
14-2 Peripheral Prioritization ............................................................................................ 14-7
14-3 RISC Controller Configuration Register Field Descriptions .................................... 14-9
14-4 RTSCR Field Descriptions...................................................................................... 14-11
14-5 RISC Microcode Revision Number ........................................................................ 14-12
14-6 CP Command Register Field Descriptions ............................................................. 14-13
14-7 CP Command Opcodes ........................................................................................... 14-15
14-8 Command Descriptions........................................................................................... 14-16
14-9 Buffer Descriptor Format........................................................................................ 14-23
14-10 Parameter RAM ...................................................................................................... 14-24
14-11 RISC Timer Table Parameter RAM ........................................................................ 14-26
MOTOROLA
Freescale Semiconductor, Inc.
Tables
Title
ACTIVATE
READ
ACTIVATE
READ
Tables
For More Information On This Product,
Go to: www.freescale.com
Command .................................. 11-52
/ Command .............................. 11-53
WRITE
Command .................................. 11-54
/ Command .............................. 11-54
WRITE
Page
Number
lxxi