Hitachi H8S/2199 Hardware Manual page 584

Field signal
VD
Selected VD
(OD/EV=0)
Value set in reference
period register 1 (RFD)
Counter
Value set in REF30
counter register (RFC)
Toggle mask
Counter mask
(clear signal mask)
REF30
REF30P
HSW
Drum phase counter
Figure 26.11 Generation of the Reference Signal when in REC (V Dislocated)
Rev. 1.0, 02/00, page 578 of 1141
Dislocation of V
Cleared
Masking
period
About 75%
Masking
period
About 75%
Sampling
Cleared
About 75%
About 75%
T
Sampling
Cleared
Sampling