Timer Counter J (Tcj); Timer Counter K (Tck) - Hitachi H8S/2199 Hardware Manual

Single-chip microcomputer

Table of Contents

Timer Counter J (TCJ)

Initial value :

The timer counter J (TCJ) is an 8-bit readable down-counter which works to count down by the

internal clock inputs or external clock inputs. The inputting clock can be selected by the PS11 and

PS10 bits of the TMJ. TCJ values can be readout always. Nonetheless, when the EXN bit in

TMJC and the 8/16 bit in TMJ are both set to 1, (means when setting is made to 16-bit operation),

reading is possible under the word command only.

At this time, the TCK of the TMJ-2 can be read by the upper 8 bits and the TCJ can be read by the

lower 8 bits. When the EXN bit in TMJC is 0, TCJ can be read only in byte units.

When the TCJ underflows (H'00 → Reloading value), regardless of the operation mode setting of

the 8/16 bit, the TMJ1I bit of the TMJS will be set to 1 bit. The TCJ and TLJ are being allocated

to the same address.

When reset, the TCJ is initialized to H'FF.

Initial value :

The timer counter K (TCK) is an 8-bit or a 16-bit readable down-counter which works to count

down by the internal clock inputs or external clock inputs. The inputting clock can be selected by

the EXN and PS2 bits of the TMIC, and the PS21 and PS20 bits of the TMJ. TCK values can be

readout always. Nonetheless, when the EXN bit in TMJC and the 8/16 bit in TMJ are both set to

1, (means when setting is made to 16-bit operation), reading is possible under the word command

At this time, the TCK can be read by the upper 8 bits and the TCJ of the TMJ-1 can be read by the

lower 8 bits. When the EXN bit in TMJC is 0, TCK works as a 16-bit counter and can be read only

in word units.

When the TCK underflows (H'00 → Reloading value), the TMJ2I bit of the TMJS will be set to 1.

The TCK and TLK are being allocated to the same address.

When reset, the TCK is initialized to H'FF.

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