Pin Configuration; Register Configuration; System Control Register (Syscr) - Hitachi H8S/2199 Hardware Manual

6.1.3

Pin Configuration

Table 6.1 summarizes the pins of the interrupt controller.
Table 6.1 Interrupt Controller Pins
Name
External interrupt
request 0
External interrupt
requests 1 to 5
6.1.4

Register Configuration

Table 6.2 summarizes the registers of the interrupt controller.
Table 6.2 Interrupt Controller Registers
Name
System control register
IRQ edge select register
IRQ enable register
IRQ status register
Interrupt control register A
Interrupt control register B
Interrupt control register C
Interrupt control register D
Port mode register 1
Notes: 1. Lower 16 bits of the address.
2. Only 0 can be written, for flag clearing.
Symbol I/O
,543
Input
,544 to
Input
,548
Abbreviation
SYSCR
IEGR
IENR
IRQR
ICRA
ICRB
ICRC
ICRD
PMR1
Function
Maskable external interrupts; rising, falling, or both
edges can be selected
Maskable external interrupts: rising, or falling
edges can be selected
R/W Initial Value
R/W H'00
R/W H'00
R/W H'00
*2
R/ (W) H'00
R/W H'00
R/W H'00
R/W H'00
R/W H'00
R/W H'00
Rev. 1.0, 02/00, page 99 of 1141
*1
Address
H'FFE8
H'FFF0
H'FFF1
H'FFF2
H'FFF3
H'FFF4
H'FFF5
H'FFF6
H'FFCE