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7.6.2
Software Protection
Software protection can be implemented by setting the SWE1 bit in FLMCR1 and SWE2 bit in
FLMCR2 and erase block registers 1 and 2 (EBR1, EBR2). When software protection is in effect,
setting the P1 or E1 bit in flash memory control register 1 (FLMCR1) or P2 or E2 bit in flash
memory control register 2 (FLMCR2) does not cause a transition to program mode or erase mode.
(See table 7.7.)
Table 7.7
Software Protection
Item
Description
• Clearing the SWE bit to 0 in FLMCR1 sets the
SWE bit
protection
• Erase protection can be set for individual blocks by
Block
specification
protection
• Setting EBR1 and EBR2 to H'00 places all blocks in
Rev. 1.0, 02/00, page 154 of 1141
program/erase-protected state for all blocks
(Execute in on-chip RAM or external memory)
settings in erase block registers 1 and 2 (EBR1, EBR2)
the erase-protected state
Functions
Program
Erase
Yes
Yes
−
Yes
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