9.3.2
External Clock Input
Circuit Configuration: An external clock signal can be input as shown in the examples in figure
9.5. If the OSC2 pin is left open, make sure that stray capacitance is no more than 10 pF.
In example (b), make sure that the external clock is held high in standby mode, subactive mode,
subsleep mode, and watch mode.
Rev. 1.0, 02/00, page 178 of 1141
OSC1
OSC2
(a) OSC2 pin left open
OSC1
OSC2
(b) Inverted-phase clock input at OSC2 pin
Figure 9.5 External Clock Input (Examples)
External clock input
Open
External clock input