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27.2.10 Data Slicer Detection Window Register (DDETWR)
Bit :
SRWDE1
Initial value :
R/W :
W
The DDETWR is an 8-bit write-only register for specifying the timing of the clock run-in
detection window signal and start bit detection window signal supplied to the data slicer. Figure
27.14 shows the timing of the signals. When reset, the DDETWR is initialized to H'00.
These detection window signals can be monitored through terminals. For details, refer to section
29.7.3, Digital Output Specification Register.
C.video
Clock run-in
detection
window signal
Start bit detection
window signal
Figure 27.14 Timing for Generating Clock Run-in Detection Window Signal and
7
6
SRWDE0
SRWDS1
0
0
W
32 × fh = 2 µs
10.5 µs
Start Bit Detection Window Signal
5
4
SRWDS0
CRWDE1
0
0
W
W
±0.5 µs
23.5 µs
23.5 µs
29.5 µs
3
2
CRWDE0
CRWDS1
0
0
W
W
32 × fh = 2 µs
±0.5 µs
±0.5 µs
Rev. 1.0, 02/00, page 781 of 1141
1
0
CRWDS0
0
0
W
W
±0.5 µs
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