29.10
OSD Operation in CPU Operation Modes
Table 29.8 shows the OSD CVout pin status for different CPU operating modes.
During a transition to power-down mode, registers are initialized, and so register settings must be
restored on return to active mode.
Table 29.8 OSD Operation for Different CPU Operating Modes
Operating Mode
Reset
Active
Module stop
Sleep, standby, watch,
subactive, or subsleep
Module Stop Bit
1
0
1
Retained
DISPM Bit
0
0
1
0
0
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CVout Pin
No output
Chroma-through and
OSD display
Text display
No output
No output