Serial/Timer Control Register (Stcr) - Hitachi H8S/2199 Hardware Manual

Table 7.3 Flash Memory Erase Blocks
Block (Size)
EB0 (4 kbytes)
EB1 (4 kbytes)
EB2 (4 kbytes)
EB3 (4 kbytes)
EB4 (4 kbytes)
EB5 (4 kbytes)
EB6 (4 kbytes)
EB7 (4 kbytes)
EB8 (32 kbytes)
EB9 (64 kbytes)
EB10 (64 kbytes)
EB11 (64 kbytes)
EB12 (1 kbyte)
EB13 (1 kbyte)
EB14 (2 kbytes)
EB15 (28 kbytes)
7.3.5

Serial/Timer Control Register (STCR)

:
Bit
:
Initial value
:
R/W
STCR is an 8-bit read/write register that controls the I
flash memory (in F-ZTAT versions), and OSD ROM. For details on IIC bus interface, refer to
2
section 23, I C Bus Interface. If a module controlled by STCR is not used, do not write 1 to the
corresponding bit. STCR is initialized to H'00 by a reset.
Bits 6 to 5    I
2
C Control (IICX1, IICX0): These bits control the operation of the I
interface. For details, see section 23, I
Rev. 1.0, 02/00, page 138 of 1141
7 6
— IICX1 IICX0
0 0
— R/W R/W
2
C Bus Interface.
Address
H'000000 to H'000FFF
H'001000 to H'001FFF
H'002000 to H'002FFF
H'003000 to H'003FFF
H'004000 to H'004FFF
H'005000 to H'005FFF
H'006000 to H'006FFF
H'007000 to H'007FFF
H'008000 to H'00FFFF
H'010000 to H'01FFFF
H'020000 to H'02FFFF
H'030000 to H'03FFFF
H'040000 to H'0403FF
H'040400 to H'0407FF
H'040800 to H'040FFF
H'041000 to H'047FFF
5 4
— FLSHE
0 0
— R/W
2
C bus interface operating mode, on-chip
3 2
OSROME —
0 0
R/W —
1 0
—
0 0
—
2
C bus