Hitachi H8S/2199 Hardware Manual page 793

(b) Using the Csync Schmitt Circuit
The Hsync component is processed in the same way as described in (a), but the Vsync
component is processed differently; the Vsync component is input through the Csync
Schmitt circuit to the digital V separation counter. Figure 27.18 shows this method.
External circuit
CVin2
Csync
External
SW2
a
b
Hsync
External
SW4
a
VLPF
Vsync
b
Figure 27.18 Sync Source Selection When Using the Csync Signal and
Source Vsync
Signal Detection
Csync Csync
input Schmitt
Rev. 1.0, 02/00, page 788 of 1141
Inside LSI
Csync
separation
comparator
CVin2
–
+
Sync tip
clamp
Register
control
External
SW1
I/O switch
Csync/Hsync
I/O
switch
External
SW3
Vsync/VLPF
the Csync Schmitt Circuit
External External
SW1 SW2
On Off
Reference
voltage switch
CCMPV0, 1
Polarity
switch
Csync polarity
Schmitt circuit
SYNCT
Polarity
switch
Vsync polarity
Schmitt circuit
External External
SW3 SW4
a Fixed to
0 or 1
CCMPSL
0
Hsync
Digital H
separation
1
counter
Internal
SW5
DLPFON
Digital V
separation
counter
Vsync
Internal
SW6
1
0
VSEL
CCMPSL VSEL
(Internal (Internal
SW5) SW6)
1 1
SEPH
SEPV
Csync/
Hsync
Terminal
I/O
Input