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H'D029: Capstan System Digital Filter Control Register CFIC: Digital Filter
Bit :
7
—
1
Initial value :
—
R/W :
Capstan system range over flag
Notes: 1. Only 0 can be written.
2. Optional.
6
5
CROV
CPHA
0
0
1
R/(W)*
R/(W)
Capstan phase system Z
0
1
Capstan phase system filter computation start bit
0
Phase system filter computation is OFF.
Phase system computation result Y is not added to Es.
1
Phase system filter computation is ON.
0
Filter computation result does not exceed 12 bits. (Initial value)
1
Filter computation result exceeds 12 bits.
4
3
CZPON
CZSON
0
0
R/W
R/W
Capstan system gain control bit
CSG2
0
1
Capstan speed system Z
0
Speed system Z
1
Speed system Z
-1
initialization bit
-1
Phase system Z
does not reflect CZs value. (Initial value)
-1
Phase system Z
reflects CZs value.
2
1
CSG2
CSG1
CSG0
0
0
R/W
R/W
R/W
CSG1 CSG0
Description
0
0
x 1
1
x 2
1
0
x 4
1
x 8
0
0
x 16
2
1
(x 32)*
2
1
0
(x 64)*
1
Invalid (do not set)
-1
initialization bit
-1
does not reflect CZs value. (Initial value)
-1
reflects CZs value.
(Initial value)
Rev. 1.0, 02/00, page 991 of 1141
0
0
(Initial value)
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