Interrupt Exception Vector Table - Hitachi H8S/2199 Hardware Manual

Single-chip microcomputer
Table of Contents

Advertisement

6.3.3

Interrupt Exception Vector Table

Table 6.4 shows interrupt exception handling sources, vector addresses, and interrupt priorities.
For default priorities, the lower the vector number, the higher the priority.
Priorities among modules can be set by means of ICR. The situation when two or more modules
are set to the same priority, and priorities within a module, are fixed as shown in table 6.4.
Table 6.4
Interrupt Sources, Vector Addresses, and Interrupt Priorities
Priority
Interrupt Source
High
Reset
Reserved
Direct transition
NMI
Trap instruction
Reserved
Low
Rev. 1.0, 02/00, page 108 of 1141
Origin of
Interrupt Source
External pin
Instruction
Watchdog timer
TRAPA#0
Instruction
TRAPA#1
TRAPA#2
TRAPA#3
Vector
No.
Vector Address
0
H'0000 to H'0003
1
H'0004 to H'0007
2
H'0008 to H'000B
3
H'000C to H'000F
4
H'0010 to H'0013
5
H'0014 to H'0017
6
H'0018 to H'001B
7
H'001C to H'001F
8
H'0020 to H'0023
9
H'0024 to H'0027
10
H'0028 to H'002B
11
H'002C to H'002F
12
H'0030 to H'0033
13
H'0034 to H'0037
14
H'0038 to H'003B
15
H'003C to H'003F
ICR
Remarks

Advertisement

Table of Contents
loading

Table of Contents