Changing Over The Internal Clocks And Counter Operations - Hitachi H8S/2199 Hardware Manual

Single-chip microcomputer
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16.7.4

Changing Over the Internal Clocks and Counter Operations

Depending on the timing of changing over the internal clocks, the FRC may count up. Table 16.6
shows the relations between the timing of changing over the internal clocks (Re-writing of the
CKS1 and CKS0) and the FRC operations.
When using an internal clock, the counting clock is being generated detecting the falling edge of
the internal clock dividing the system clock (φ). For this reason, like Item No. 3 of table 16.6,
count clock signals are issued deeming the timing before the changeover as the falling edge to
have the FRC to count up.
Also, when changing over between an internal clock and the external clock, the FRC may count
up.
Table 16.6 Changing Over the Internal Clocks and the FRC Operation
Rewriting Timing for
the CKS1 and CKS0
No.
Low → low level
1
changeover
Low → High level
2
changeover
FRC Operation
Clock before
the changeover
Clock after
the changeover
Count
clock
FRC
N
Rewriting of the CKS1 and CKS0
Clock before
the changeover
Clock after
the changeover
Count
clock
FRC
N
N+1
N+1
Rewriting of the CKS1 and CKS0
Rev. 1.0, 02/00, page 345 of 1141
N+2

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