Osd Oscillator, Afc, And Dot Clock; Sync Signals; Afc Circuit; Dot Clock - Hitachi H8S/2199 Hardware Manual

Single-chip microcomputer
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29.9

OSD Oscillator, AFC, and Dot Clock

In order to use the OSD, sync signals and a 4/2fsc clock signal are required.
29.9.1

Sync Signals

The sync signal for text display mode is a signal created from a 4/2fsc clock or an AFC reference
clock. In superimposed mode, sync signals may be selected from one of the following three types.
1. Horizontal/vertical sync signals separated by the sync separator from the composite video
signal (Cvin2)
2. Horizontal/vertical sync signals separated by the sync separator from the composite sync signal
(Csync)
3. Hsync and Vsync signals input separately
For details, refer to section 27, Sync Separator for OSD and Data Slicer.
29.9.2

AFC Circuit

The AFC circuit averages the "fluctuation" in the horizontal sync signal (Hsync) during normal
VCR playback, reducing OSD display jitter. In addition, the AFC circuit generates the dot clock.
Be sure that an external circuit is connected. For details, refer to section 27.3.6, Automatic
Frequency Controller (AFC).
29.9.3

Dot Clock

The dot clock is a clock used for X-direction (horizontal direction) OSD display; it is
synchronized with the horizontal sync signal generated by the AFC circuit. The dot clock
frequency is 576 or 448 times the horizontal sync signal frequency (576 × fh or 448 × fh). The size
of one dot in the horizontal direction of the OSD display appearing on the screen is the equivalent
of one dot clock cycle. Accordingly, modifying the FRQSEL bit in the sync separator to change
the horizontal sync signal frequency can adjust the dot size. The dot clock cycle is the same in
superimposed mode and text display mode; it is also the same for both interlaced and
noninterlaced displays. It changes somewhat depending on the TV format. The relation between
TV format and dot clock cycle is shown in table 29.6.
Rev. 1.0, 02/00, page 872 of 1141

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