Register Descriptions; Timer Mode Register A (Tma) - Hitachi H8S/2199 Hardware Manual

Single-chip microcomputer
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11.2

Register Descriptions

11.2.1

Timer Mode Register A (TMA)

Bit :
TMAOV
Initial value :
R/W :
R/(W)*
Note: * Only 0 can be written to clear the flag.
The timer mode register A (TMA) works to control the interrupts of timer A and to select the input
clock.
TMA is an 8-bit read/write register. When reset, the TMA will be initialized to H'30.
Bit 7    Timer A Overflow Flag (TMAOV): This is a status flag indicating the fact that the TCA
is overflowing (H'FF → H'00).
Bit 7
TMAOV
Description
0
[Clearing conditions]
When 0 is written to the TMAOV flag after reading the TMAOV flag under the status
where TMAOV = 1
1
[Setting conditions]
When the TCA overflows
Bit 6    Enabling Interrupt of the Timer A (TMAIE): This bit works to permit/prohibit
occurrence of interrupt of the Timer A (TMAI) when the TCA overflows and when the TMAOV
of the TMA is set to 1.
Bit 6
TMAIE
Description
0
Prohibits occurrence of interrupt of the Timer A (TMAI)
1
Permits occurrence of interrupt of the Timer A (TMAI)
Bits 5 and 4    Reserved: These bits cannot be modified and are always read as 1.
7
6
5
TMAIE
0
0
1
R/W
4
3
2
TMA3
TMA2
1
0
0
R/W
R/W
Rev. 1.0, 02/00, page 249 of 1141
1
0
TMA1
TMA0
0
0
R/W
R/W
(Initial value)
(Initial value)

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