Hitachi H8S/2199 Hardware Manual page 479

Bits 5 to 3    Transfer Clock Select (CKS2 to CKS0): These bits, together with the IICX1 bit
(for channel 1) or IICX0 bit (for channel 0) in STCR, select the serial clock frequency in master
mode. They should be set according to the required transfer rate.
STCR
Bits 5, 6 Bit 5
IICX CKS2
0 0
1
1 0
1
Bit 4 Bit 3
CKS1 CKS0
0 0
1
1 0
1
0 0
1
1 0
1
0 0
1
1 0
1
0 0
1
1 0
1
φ φ φ φ = 8 MHz
Clock
φ/28
286 kHz
φ/40
200 kHz
φ/48
167 kHz
φ/64
125 kHz
φ/80
100 kHz
φ/100
80.0 kHz
φ/112
71.4 kHz
φ/128
62.5 kHz
φ/56
143 kHz
φ/80
100 kHz
φ/96
83.3 kHz
φ/128
62.5 kHz
φ/160
50.0 kHz
φ/200
40.0 kHz
φ/224
35.7 kHz
φ/256
31.3 kHz
Rev. 1.0, 02/00, page 471 of 1141
Transfer Rate
φ φ φ φ = 10 MHz
357 kHz
250 kHz
208 kHz
156 kHz
125 kHz
100 kHz
89.3 kHz
78.1 kHz
179 kHz
125 kHz
104 kHz
78.1 kHz
62.5 kHz
50.0 kHz
44.6 kHz
39.1 kHz