Features; Block Diagram - Hitachi H8S/2199 Hardware Manual

Single-chip microcomputer

Table of Contents

Features

• Horizontal sync signal separation: Stable separation is provided by the AFC, and complement

and mask functions are available.

• AFC reference clock frequency: 576 or 448 times the frequency of the horizontal sync signal

can be selected.

• Vertical sync signal separation: The masking and complement functions are available through

the V complement and mask counter.

• The source for sync separation can be selected from three signals (five methods).

1. Composite video signal input from the CVin2 terminal (two methods)

2. Csync signal input from the Csync/Hsync terminal (two methods)

3. Vsync and Hsync signals that are input from the VLPF/Vsync and Csync/Hsync terminals,

respectively (one method)

• Csync separation comparator: The slice level can be selected by register settings.

• Polarity of the Csync/Hsync terminal input: The signal detection polarity can be selected.

• Polarity of the VLPF/Vsync terminal input: The signal detection polarity can be selected.

• Noise detection: Noise during one frame is counted and a noise detection interrupt is

generated when the count reaches the specified value.

• Noise detection counter: The count is readable and is reset every other vertical sync signal

• Field detection: The odd or even field for interlace scanning is distinguished.

• Reference Hsync signal for the AFC: The reference Hsync signal can be selected.

• V complement and mask counter: The source for the counter clock (twice the frequency of the

horizontal sync signal) can be selected.

• Internal Csync generator: The clock source for the internal Csync generator can be selected.

Figure 27.1 shows the block diagram of the sync separator.

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