Hitachi H8S/2199 Hardware Manual page 118

6.2 Register Descriptions
6.2.1 System Control Register (SYSCR)
Bit :
7
—
Initial value :
0
—
R/W :
SYSCR is an 8-bit readable register that selects the interrupt control mode.
Only bits 5, 4, 2 and 1 are described here; for details on the other bits, see section 3.2.2, System
Control Register (SYSCR).
SYSCR is initialized to H'08 by a reset.
Bits 5 and 4    Interrupt Control Mode (INTM1, INTM0): These bits select one of two
interrupt control modes for the interrupt controller. The INTM1 bit must not be set to 1.
Bit 5 Bit 4
INTM1 INTM0
0 0
1
1 0
1
Rev. 1.0, 02/00, page 100 of 1141
6 5
— INTM1
0 0
—
R
Interrupt Control
Mode
0
1


4 3
INTM0 XRST
0 1
R/W R
Description
Interrupts are controlled by I bit (Initial value)
Interrupts are controlled by I and UI bits and ICR
Cannot be used in this LSI
Cannot be used in this LSI
2 1
— —
0 0
— —
0
—
0
—